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TVM for TI C7™ NPU

This is a fork of Apache TVM 0.23.0 that adds a compiler backend and runtime for Texas Instruments' C7™ NPU -- a floating-point vector DSP core that combines traditional DSP capability, vector processing, and a deep learning accelerator, paired with Arm cores in TI's AM67A/J722S SoCs. It covers the full pipeline from Relax graph-level IR through C code generation, a minimal embedded runtime, remoteproc firmware for the AM67A, and comprehensive pytest-based test infrastructure.

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Project status

TVM/Relax for the C7™ NPU is not production-ready -- it is an active work-in-progress fork of Apache TVM. Expect incomplete operator coverage, and unpolished edges.

Scope

  • This project targets only one of the two C7™ DSP cores present on the AM67A SoC (TI's AM67A datasheet.
  • TIDL subgraph offload is not enabled on BeagleY-AI. That board uses MMALIB direct offload only (--tidl OFF --mmalib ON).

License

TVM is licensed under the Apache-2.0 license (LICENSE in the source tree). For the full open-source license manifest and export classification for this release, see TI_TVM_for_C7x_MMA_0.23.0_manifest.html in the repository root.

Supported Targets

Target Device DSP
c_static -mcpu=c7x J722S / AM67A C7™ DSP

Two boards are supported via --board/--ddr on the runtime and firmware build scripts (see the usage header in src/runtime/ti_dsp/build_runtime.sh); --board is required for any hardware build -- there is no default:

  • AM67A EVM (j722s-evm) -- TI's evaluation module, orderable directly from TI.
  • BeagleY-AI (beagley-ai) -- an open-hardware single-board computer built around the same J722S SoC.

Also supports host emulation (x86 GCC) for development and CI without hardware.

Documentation

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